🎉 Release V13.0 ================ The Icarus Verilog development team is pleased to announce **Release V13** of Icarus Verilog. Release V13 builds on the V12 series with a focus on correctness, runtime stability, improved diagnostics, and incremental standard conformance improvements. ---- 🐞 Bug Fix Summary ------------------ Release V13 resolves numerous issues reported against V12, including: * Incorrect signed constant handling. * Generate block naming collisions. * Elaboration-time assertion failures. * Runtime crashes in malformed corner cases. * Memory management issues during elaboration and simulation. ---- 🔄 Major Changes in V13 ======================= 🧠 Language & Elaboration Fixes ------------------------------- Release V13 includes multiple fixes to elaboration and expression handling: * Resolved generate block scope resolution issues affecting nested and conditional generate constructs. * Corrected signed arithmetic corner cases, including shift and width propagation behavior. * Fixed constant expression evaluation inconsistencies during parameter elaboration. * Improved handling of packed and unpacked arrays in assignments and port binding corner cases. * Addressed elaboration-time assertion failures triggered by malformed or ambiguous constructs. * Corrected several source-location reporting issues for elaboration errors. These changes improve standards conformance and eliminate behavioral inconsistencies observed in the V12 series. ---- ⚙️ Simulator (vvp) Improvements ------------------------------- The `vvp` runtime engine has received internal stability and correctness updates: * Improved event scheduling behavior in zero-delay and non-blocking assignment scenarios. * Fixed race-condition corner cases uncovered by expanded regression testing. * Eliminated memory leaks affecting long-running or large simulations. * Resolved crash conditions caused by invalid internal state transitions. * Improved robustness of `$dumpvars` handling in large hierarchical designs. * General runtime consistency and determinism improvements. `vvp` continues to enforce version matching between the runtime and generated bytecode. Designs must be recompiled after upgrading. ---- 🔌 VPI Updates -------------- Fixes improve VPI reliability and conformance: * Corrected hierarchical object lookup behavior in specific corner cases. * Improved stability of callback registration during startup and shutdown. * Fixed invalid handle dereference scenarios that could result in segmentation faults. * Addressed inconsistencies in VPI object property reporting. ---- 🛠 Diagnostics & Toolchain -------------------------- * Improved clarity and consistency of error and warning messages. * Better reporting of width mismatches and implicit net declarations. * More accurate diagnostic source locations. * Build system updates for compatibility with modern compiler toolchains. * Regression suite expansion and CI validation improvements. ---- 📦 Upgrade Notes ---------------- * Recompile all designs when upgrading from V12 or any other prior version. * Review warnings carefully; improved diagnostics may expose previously silent issues. * The only known breaking change is that wires must now be declared before use; which is required in the standard (see `gh1287 `__). ---- 🙏 Acknowledgments ------------------ We thank all contributors who reported issues, submitted patches, expanded regression coverage, and improved documentation. Release 13 reflects continued community effort toward improving correctness, stability, and maintainability.